{"id":10412,"date":"2026-02-12T04:02:33","date_gmt":"2026-02-12T04:02:33","guid":{"rendered":"https:\/\/mailitics.com\/index.php\/2026\/02\/12\/ai-learns-to-perform-analog-layout-design\/"},"modified":"2026-02-12T04:02:33","modified_gmt":"2026-02-12T04:02:33","slug":"ai-learns-to-perform-analog-layout-design","status":"publish","type":"post","link":"https:\/\/mailitics.com\/index.php\/2026\/02\/12\/ai-learns-to-perform-analog-layout-design\/","title":{"rendered":"AI learns to perform analog layout design"},"content":{"rendered":"<p>    AI learns to perform analog layout design<br \/>\n \t<BR><br \/>\n<BR><\/BR><br \/>\n    <!-- no image --><br \/>\n \t<BR><br \/>\n<BR><\/BR><\/p>\n<div>Researchers at Pohang University of Science and Technology (POSTECH) have developed an artificial intelligence approach that addresses a key bottleneck in analog semiconductor layout design, a process that has traditionally depended heavily on engineers&#8217; experience. The work was recently published in the journal IEEE Transactions on Circuits and Systems I: Regular Papers.<\/div>\n<p> \t<BR><br \/>\n <BR><\/BR><\/p>\n<p> \t<BR><br \/>\n<BR><\/BR><br \/>\n<a href=\"https:\/\/techxplore.com\/news\/2026-02-ai-analog-layout.html\">Go to techxplore<\/a><br \/>\n \t<BR><br \/>\n <BR><\/BR><\/p>\n","protected":false},"excerpt":{"rendered":"<p>AI learns to perform analog layout design Researchers at Pohang University of Science and Technology (POSTECH) have developed an artificial intelligence approach that addresses a key bottleneck in analog semiconductor layout design, a process that has traditionally depended heavily on engineers&#8217; experience. The work was recently published in the journal IEEE Transactions on Circuits and [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[237,45],"tags":[50],"class_list":["post-10412","post","type-post","status-publish","format-standard","hentry","category-electronics-semiconductors","category-techxplore","tag-techxplore"],"_links":{"self":[{"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/posts\/10412"}],"collection":[{"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/comments?post=10412"}],"version-history":[{"count":0,"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/posts\/10412\/revisions"}],"wp:attachment":[{"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/media?parent=10412"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/categories?post=10412"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/mailitics.com\/index.php\/wp-json\/wp\/v2\/tags?post=10412"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}